System-level SRAM yield enhancement

Fadi J. Kurdahi, Ahmed M. Eltawil, Young Hwan Park, Rouwaida N. Kanj, Sani R. Nassif

Research output: Chapter in Book/Report/Conference proceedingConference contribution

25 Scopus citations

Abstract

It is well known that SRAM constitutes a large portion of modern integrated circuits, with 80% or more of the total transistors being dedicated to SRAM in a typical processor or SOC. Thus yield management of these SRAMs plays a crucial role in insuring design success. This paper demonstrates analysis techniques to model and improve the yield of SRAMs at the system level by proper accounting for the coupling between the algorithms targeted for an SOC and the performance, power, and yield of SRAMs used in implementing the algorithms. It is shown that coupling the algorithm and SRAM design phases provides significant advantages over independent optimization. © 2006 IEEE.
Original languageEnglish (US)
Title of host publicationProceedings - International Symposium on Quality Electronic Design, ISQED
DOIs
StatePublished - Dec 1 2006
Externally publishedYes

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