Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration

Luca Pirro, Amer El Hajj Diab, Irina Ionica, Gerard Ghibaudo, Lorenzo Faraone, Sorin Cristoloveanu

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic. © 1963-2012 IEEE.
Original languageEnglish (US)
Pages (from-to)2717-2723
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume62
Issue number9
DOIs
StatePublished - Sep 2015

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