Power gating of VLSI circuits using MEMS switches in low power applications

Hosam Shobak, Mohamed T. Ghoneim, Nawal El Boghdady, Sarah Halawa, Sophinese M. Iskander, Mohab H. Anis

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

Power dissipation poses a great challenge for VLSI designers. With the intense down-scaling of technology, the total power consumption of the chip is made up primarily of leakage power dissipation. This paper proposes combining a custom-designed MEMS switch to power gate VLSI circuits, such that leakage power is efficiently reduced while accounting for performance and reliability. The designed MEMS switch is characterized by an 0.1876 ? ON resistance and requires 4.5 V to switch. As a result of implementing this novel power gating technique, a standby leakage power reduction of 99% and energy savings of 33.3% are achieved. Finally the possible effects of surge currents and ground bounce noise are studied. These findings allow longer operation times for battery-operated systems characterized by long standby periods. © 2011 IEEE.
Original languageEnglish (US)
Title of host publicationICM 2011 Proceeding
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
ISBN (Print)9781457722073
DOIs
StatePublished - Dec 2011

Fingerprint Dive into the research topics of 'Power gating of VLSI circuits using MEMS switches in low power applications'. Together they form a unique fingerprint.

Cite this