Phase locked loop with fast tracking over wide stability range under grid faults

Ahmed S. Morsy, Prasad Enjeti, Shehab Ahmed, Ahmed Massoud

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

This paper introduces a PLL characterized by fast dynamics, wide stability range and minimal deviations. The proposed PLL is based on a frequency adaptive filtering stage to minimize the frequency and phase deviations under unbalanced conditions and harmonic distortions. Furthermore, a simple mathematical formula is introduced to modify the conventional synchronous frame based PLL to provide more stabilization points for the PLL. The advantages of the proposed PLL are verified through simulations. © 2014 IEEE.
Original languageEnglish (US)
Title of host publicationConference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479923250
DOIs
StatePublished - Jan 1 2014
Externally publishedYes

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