On the short-term predictability of fully digital chaotic oscillators for pseudo-random number generation

Ahmed Gomaa Radwan, Abhinav S. Mansingka, Khaled N. Salama, Mohammed A. Zidan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

This paper presents a digital implementation of a 3rd order chaotic system using the Euler approximation. Short-term predictability is studied in relation to system precision, Euler step size and attractor size and optimal parameters for maximum performance are derived. Defective bits from the native chaotic output are neglected and the remaining pass the NIST SP. 800-22 tests without post-processing. The resulting optimized pseudorandom number generator has throughput up to 17.60 Gbits/s for a 64-bit design experimentally verified on a Xilinx Virtex 4 FPGA with logic utilization less than 1.85%.
Original languageEnglish (US)
Title of host publication2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages373-376
Number of pages4
ISBN (Print)9781479924523
DOIs
StatePublished - May 16 2014

Fingerprint Dive into the research topics of 'On the short-term predictability of fully digital chaotic oscillators for pseudo-random number generation'. Together they form a unique fingerprint.

Cite this