This paper highlights the challenges of an emergent field, namely, on-chip antenna design. Consistent with the RF System-on-Chip (SoC) concept, co-design strategy for circuits and on-chip antennas is described. A number of design and layout issues, arising from the highly integrated nature of this kind of systems, are discussed. The characterization difficulties related to on-chip antennas radiation properties are also highlighted. Finally, a novel on-wafer test fixture is proposed to measure the gain and radiation pattern of the on-chip antennas in the anechoic chamber.
|Original language||English (US)|
|Title of host publication||2010 14th International Symposium on Antenna Technology and Applied Electromagnetics & the American Electromagnetics Conference|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|State||Published - Dec 13 2010|