Multicore-Optimized Wavefront Diamond Blocking for Optimizing Stencil Updates

Tareq Majed Yasin Malas, G. Hager, Hatem Ltaief, H. Stengel, G. Wellein, David E. Keyes

Research output: Contribution to journalArticlepeer-review

55 Scopus citations

Abstract

The importance of stencil-based algorithms in computational science has focused attention on optimized parallel implementations for multilevel cache-based processors. Temporal blocking schemes leverage the large bandwidth and low latency of caches to accelerate stencil updates and approach theoretical peak performance. A key ingredient is the reduction of data traffic across slow data paths, especially the main memory interface. In this work we combine the ideas of multicore wavefront temporal blocking and diamond tiling to arrive at stencil update schemes that show large reductions in memory pressure compared to existing approaches. The resulting schemes show performance advantages in bandwidth-starved situations, which are exacerbated by the high bytes per lattice update case of variable coefficients. Our thread groups concept provides a controllable trade-off between concurrency and memory usage, shifting the pressure between the memory interface and the CPU. We present performance results on a contemporary Intel processor.
Original languageEnglish (US)
Pages (from-to)C439-C464
Number of pages1
JournalSIAM Journal on Scientific Computing
Volume37
Issue number4
DOIs
StatePublished - Jul 3 2015

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