This paper presents three reconfigurable radio systems developed within CTVR, The Telecommunications Research Centre and demonstrated at the IEEE International Dynamic Spectrum Access Networks (DySPAN) symposium held in Chicago in October 2008. All three systems were developed using the Iris cognitive radio network architecture. Each system employs a different processing platform. Today's radio communication standards feature increasing levels of flexibility and reconfigurability as designers strive to extract as much performance as possible from the resources available. To provide the required flexibility, general processing platforms are being employed to a greater extent than ever before. At the same time, the range and scope of available processing platforms is expanding. The systems presented in this paper use three such general processing platforms; a multicore General Purpose Processor (GPP), the Cell Broadband Engine (CellBE) and a Xilinx Field Programmable Gate Array (FPGA). The paper provides an overview of Iris and looks at each demonstration system in turn, illustrating the way in which the unique features of each platform are used. The authors present a number of insights gained in the course of developing the systems and address the role of experimentation in emerging wireless networks research.
|Original language||English (US)|
|Title of host publication||2010 Proceedings of the 5th International Conference on Cognitive Radio Oriented Wireless Networks and Communications, CROWNCom 2010|
|State||Published - Oct 28 2010|