mPL6: A robust multilevel mixed-size placement engine

Tony F. Chan*, Jason Cong, Michails Romesis, Joseph R. Shinnerl, Kenton Sze, Min Xie

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

27 Scopus citations

Abstract

The most recent version of the mPL multilevel placement algorithm, mPL6, is reviewed. This version is derived from the mPL5 placer (ISPD05) and the Patoma floorplanner (ASPDAC05). It is also augmented by new techniques for detailed placement. As a result, it can handle mixed-size placement very effectively. First-choice clustering is used to construct a hierarchy of problem formulations. Generalized force-directed placement guides global placement at each level of the cluster hierarchy. Prior to interpolation of each coarse-level solution to its adjacent finer level, however, recursive, top-down displacement-minimizing floorplanning optimizes block orientations and checks that overlap can be removed at the current level. Where necessary, the floor-planner perturbs coarse-level solutions enough that legalization of the given placement can be assured. The resulting flow is scalable and robust, and it produces very low-wirelength solutions for known benchmark circuits.

Original languageEnglish (US)
Title of host publicationmPL6
Pages227-229
Number of pages3
StatePublished - Dec 27 2005
Externally publishedYes
Event2005 International Symposium on Physical Design, ISPD'05 - San Francisco, CA, United States
Duration: Apr 3 2005Apr 6 2005

Conference

Conference2005 International Symposium on Physical Design, ISPD'05
CountryUnited States
CitySan Francisco, CA
Period04/3/0504/6/05

Keywords

  • Force-Directed Placement
  • Helmholtz Equation
  • Legalization
  • Mixed-Size Placement
  • Multilevel Optimization

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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