Crossbar memristor arrays provide a promising high density alternative for the current memory and storage technologies. These arrays suffer from parasitic current components that significantly increase the power consumption, and could ruin the readout operation. In this work we study the trade-off between the crossbar array density and the power consumption required for its readout. Our analysis is based on simulating full memristor arrays on a SPICE platform.
|Original language||English (US)|
|Title of host publication||2014 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|State||Published - Jul 2014|