Improved NPC Inverters without Short-Circuit and Dead-time Issues

Ashraf Ali Khan, Usman Ali Khan, Furqan Ahmed, Honnyong Cha, Shehab Ahmed Ahmed

Research output: Contribution to journalArticlepeer-review

Abstract

This paper presents a family of NPC inverters consisting of single-phase, three-phase, and cascaded inverters. The proposed inverters have no short-circuit and dead-time issues, therefore no high voltage and current spikes are caused. Also, the dead-time in the switching signals can be eliminated or minimized. As a result, the magnitude of the output waveforms can be increased, and quality can be improved. Unlike the dual-buck NPC inverter, the voltage stress of all the semiconductor in the proposed inverter is lower, and unlike the split-inductor NPC inverter the proposed inverter provides reactive power. In this paper, the proposed three-level NPC inverter is analyzed, designed, and tested. The voltage stress of the semiconductor devices in the proposed inverter is half of the source voltage, whereas in the conventional dual-buck NPC inverter the voltage stress of the two external diodes is the source voltage. In addition to the aforementioned benefits, the proposed cascaded inverter reduces the total number of inductors. To verify the analysis, detailed simulation, and experimental results of the proposed three-level inverter with input voltage 640 V, output power 1.2 kW, and output voltage 220 Vrms are provided
Original languageEnglish (US)
Pages (from-to)1-1
Number of pages1
JournalIEEE Transactions on Power Electronics
DOIs
StatePublished - 2021

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