In this paper a novel timing tracking circuit for CDMA applications is presented. The circuit utilizes a linear interpolator and a Schmitt quantizer to achieve the optimal tradeoff between design complexity and robustness. System simulations, experimental measurements, gate counts and power consumption issues are presented and analyzed. © 2005 IEEE.
|Original language||English (US)|
|Title of host publication||Proceedings of the Custom Integrated Circuits Conference|
|State||Published - Dec 1 2005|