High-speed scanning thermal lithography for nanostructuring of electronic devices

Joseph E. Shaw, Paul N. Stavrinou, Thomas Anthopoulos*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

We report a detailed analysis on the use of simultaneous substrate heating in conjunction with scanning thermal lithography (SThL) to dramatically increase the patterning speed of conventional SThL systems. The investigation consists of finite element simulations as well as practical assessments of the speed at which different organic precursors are thermally converted to produce standalone electrically active and passive nanostructures. As a proof of concept the high-speed SThL method was used to pattern semiconducting pentacene nanoribbons, which were subsequently incorporated into functioning transistors. Simultaneous substrate heating was found to allow patterning of functional devices at writing speeds >19 times higher than transistors produced at identical speeds but with the substrate maintained at room temperature. These fast written transistors exhibit 100× higher hole mobility with high on/off current ratio and negligible operating hysteresis. The generality of the proposed high-speed SThL method was further demonstrated with the rapid patterning of conductive nanostructured metal electrodes with excellent spatial resolution employing an appropriate polymer precursor as the chemical resist. It is proposed that these advances further support the case for using SThL systems as rapid prototypers for low micron and nanoscale structures for both direct patterning of precursors and indirect patterning of metals and other materials using suitable chemical resist.

Original languageEnglish (US)
Pages (from-to)5813-5819
Number of pages7
JournalNanoscale
Volume6
Issue number11
DOIs
StatePublished - Jun 7 2014

ASJC Scopus subject areas

  • Materials Science(all)

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