P-channel WSe2 FETs along with multilayer graphene source/drain (S/D) are demonstrated by the CVD growth of the WSe2 monolayer to the patterned graphene. Multilayer graphene (MLG) is adopted to reduce contact resistance while the monolayer WSe2 served as the channel for the electrostatics integrity of the FET. Furthermore, by increasing the p-type doping concentration of the graphene S/D, the Ion/Ioff ratio can be enhanced to 108 and the unipolar p-channel characteristics are retained regardless the choice of the work function of the metal used for the S/D contact.
|Original language||English (US)|
|Title of host publication||2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|State||Published - Oct 2018|