Gate tunable giant anisotropic resistance in ultra-thin GaTe

Hanwen Wang, Mao-Lin Chen, Mengjian Zhu, Yaning Wang, Baojuan Dong, Xingdan Sun, Xiaorong Zhang, Shimin Cao, Xiaoxi Li, Jianqi Huang, Lei Zhang, Weilai Liu, Dongming Sun, Yu Ye, Kepeng Song, Jianjian Wang, Yu Han, Teng Yang, Huaihong Guo, Chengbing QinLiantuan Xiao, Jing Zhang, Jianhao Chen, Zheng Han, Zhidong Zhang

Research output: Contribution to journalArticlepeer-review

26 Scopus citations

Abstract

Anisotropy in crystals arises from different lattice periodicity along different crystallographic directions, and is usually more pronounced in two dimensional (2D) materials. Indeed, in the emerging 2D materials, electrical anisotropy has been one of the recent research focuses. However, key understandings of the in-plane anisotropic resistance in low-symmetry 2D materials, as well as demonstrations of model devices taking advantage of it, have proven difficult. Here, we show that, in few-layered semiconducting GaTe, electrical conductivity anisotropy between x and y directions of the 2D crystal can be gate tuned from several fold to over 103. This effect is further demonstrated to yield an anisotropic non-volatile memory behavior in ultra-thin GaTe, when equipped with an architecture of van der Waals floating gate. Our findings of gate-tunable giant anisotropic resistance effect pave the way for potential applications in nanoelectronics such as multifunctional directional memories in the 2D limit.
Original languageEnglish (US)
JournalNature Communications
Volume10
Issue number1
DOIs
StatePublished - May 24 2019

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