Neuromorphic computer will need folded architectural form factor to match brain cortex's folded pattern for ultra-compact design. In this work, we show a state-of-the-art CMOS compatible pragmatic fabrication approach of building structurally foldable and densely integrated neuromorphic devices for non-volatile memory applications. We report the first ever memristive devices with the size of a motor neuron on bulk mono-crystalline silicon (100) and then with trench-protect-release-recycle process transform the silicon wafer with devices into a flexible and semi-transparent silicon fabric while recycling the remaining wafer for further use. This process unconditionally offers the ultra-large-scale-integration opportunity-increasingly critical for ultra-compact memory.
|Original language||English (US)|
|Title of host publication||2014 14th International Workshop on Cellular Nanoscale Networks and their Applications (CNNA)|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|State||Published - Jul 2014|