Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture

Thanakorn Khamvilai, Louis Sutter, Jose M.Magalhaes Junior, Aqib A. Syed, Eric Feron

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The development of multi-core processors has been providing benefits to many industries. However, some issues may arise among these benefits because of the potential conflicts between parallel applications. One of the important concerns is the reliability of the safety critical applications. This paper proposes two algorithms for computing a probability of failure of the safety-critical application on reconfigurable multi-core architecture. One is based on the exact analytical computation; whereas, the other one is the approximated of the former with less computational expensive. These algorithms adopts a combination of a fault tree analysis and a subgraph isomorphism problem to apply for avionics application. Their numerical results and performance analysis are also included.
Original languageEnglish (US)
Title of host publicationAIAA/IEEE Digital Avionics Systems Conference - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781728106496
DOIs
StatePublished - Sep 1 2019
Externally publishedYes

Fingerprint Dive into the research topics of 'Fault Assessment of Safety-Critical Applications on Reconfigurable Multi-Core Architecture'. Together they form a unique fingerprint.

Cite this