The universal underlying assumption made today is that Systems on chip must maintain 100% correctness regardless of the application. This work advocates the concept that some applications - by construction - are inherently error tolerant and therefore do not require this strict bound of 100 % correctness. In such cases, it is possible to exploit this tolerance by aggressively reducing the supply voltage, thereby reducing power consumption significantly. This approach is demonstrated on several case studies in imaging, video and wireless communication fields. © 2007 IEEE.
|Original language||English (US)|
|Title of host publication||Proceedings - 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, DSD 2007|
|State||Published - Dec 1 2007|