Dual work function high-k/metal gate CMOS FinFETs

Muhammad Mustafa Hussain*, Casey Smith, Pankai Kalra, Ji Woon Yang, Gabe Gebara, Barry Sassman, Paul Kirsch, Prashant Majhi, Seung Chul Song, Rusty Harris, Hsing Huang Tseng, Raj Jammy

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

For the first time, a set of complementary metal oxide semiconductor (CMOS) FinFET devices with two different high-k/metal gate stacks of dual work function has been integrated on the same wafer to overcome the integration complexity. Two completely different metals deposited by atomic layer deposition have been Integrated In a process that includes gate stack integration and dual metal gate etch. Excellent short channel characteristics with low drain induced barrier lowering (DIBL) and subthreshold swing ASS have been observed with fairly symmetric VTh.

Original languageEnglish (US)
Title of host publicationESSDERC07 - 2007 37th European Solid State Device Research Conference
PublisherIEEE Computer Society
Pages207-209
Number of pages3
ISBN (Print)1424411238, 9781424411238
DOIs
StatePublished - Jan 1 2008
EventESSDERC 2007 - 37th European Solid-State Device Research Conference - Munich, Germany
Duration: Sep 11 2007Sep 13 2007

Publication series

NameESSDERC 2007 - Proceedings of the 37th European Solid-State Device Research Conference
Volume2007

Other

OtherESSDERC 2007 - 37th European Solid-State Device Research Conference
CountryGermany
CityMunich
Period09/11/0709/13/07

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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