Deterministic and preemptive thread scheduling and its use in debugging multithreaded applications

Research output: Patent

Abstract

A computer system which permits deterministic and preemptive scheduling of threads in a software application. In one embodiment, a scheduler is utilized to schedule the threads in a queue. Once the threads are scheduled, they are divided up into instruction slices each consisting of a predetermined number of instructions. The scheduler executes each instruction slice. An instruction counter is utilized to keep track of the number of instructions executed. The thread is permitted to run the instruction slice until the predetermined number of instructions has been executed. Alternatively, the thread stops if it is blocked while waiting for an input, for example. The next thread is then executed for the same number of instructions. This process permits for the efficient debugging of software which utilizes traditional cyclic debugging.

Original languageEnglish (US)
Patent numberUS6625635
IPCG06F 11/ 36 A I
Priority date11/2/98
StatePublished - Sep 23 2003
Externally publishedYes

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