Designing a virtual runtime for FPGA accelerators in the cloud

Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Scopus citations

Abstract

FPGAs can provide high performance and energy efficiency to many applications; therefore, they are attractive computing platforms in a cloud environment. However, FPGA application development requires extensive hardware design knowledge which significantly limits the potential user base. Moreover, in a cloud setting, allocating a whole FPGA to a user is often wasteful and not cost effective due to low device utilization. To make FPGA application development easier, firstly, we propose a methodology that provides clean abstractions with high-level APIs and a simple execution model that supports both software and hardware execution. Secondly, to improve device utilization and share the FPGA among multiple users, we developed a lightweight runtime system that provides hardware-assisted memory virtualization and memory protection, enabling multiple applications to simultaneously execute on the device.
Original languageEnglish (US)
Title of host publicationFPL 2016 - 26th International Conference on Field-Programmable Logic and Applications
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9782839918442
DOIs
StatePublished - Sep 26 2016
Externally publishedYes

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