A cylindrical-shaped nanotube FET may be manufactured on silicon (Si) substrates as a ring etched into a gate stack and filled with semiconductor material. An inner gate electrode couples to a region of the gate stack inside the inner circumference of the ring. An outer gate electrode couples to a region of the gate stack outside the outer circumference of the ring. The multi-gate cylindrical-shaped nanotube FET operates in volume inversion for ring widths below 15 nanometers. The cylindrical-shaped nanotube FET demonstrates better short channel effect (SCE) mitigation and higher performance (I.sub.on/I.sub.off) than conventional transistor devices. The cylindrical-shaped nanotube FET may also be manufactured with higher yields and cheaper costs than conventional transistors.
|Original language||English (US)|
|Patent number||US 9224813 B2|
|State||Published - Dec 29 2015|