Critical components of FinFET integration: Examining the density trade-off and process integration for FinFIT implementation

H. Rusty Harris, Muhammad Mustafa Hussain, Ji Woon Yang, Casey Smith, Joel Barnett, Barry Sassman, S. C. Song, B. H. Lee, H. F. Tseng, Raj Jammy

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

While the scaling efforts continue into a device regime performance simply may not come without large scale off state leakage issues, significant device changes are being considered such as FinFETs. The concept of a double- or triple-channel device is not new, but the practical roadblock to implementing such a device has some familiar problems from an integration standpoint. Furthermore, new issues that the 3-dimensionality of FinFETs presents create integration challenges for series resistance and overall packing density. In this paper, we outline the critical issues and present practical solutions to these problems from a theoretical standpoint. It is shown that clear pathways do exist in spacer, silicide and epitaxial source/drain with unit process development. Finally, the implementation of necessary techniques such as spacer transfer and compatibility with high k/metal gate integration is examined.

Original languageEnglish (US)
Title of host publicationECS Transactions - 5th International Symposium on ULSI Process Integration
Pages331-338
Number of pages8
Edition6
DOIs
StatePublished - Dec 1 2007
Event5th International Symposium on ULSI Process Integration - 212th ECS Meeting - Washington, DC, United States
Duration: Oct 7 2007Oct 12 2007

Publication series

NameECS Transactions
Number6
Volume11
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

Other5th International Symposium on ULSI Process Integration - 212th ECS Meeting
CountryUnited States
CityWashington, DC
Period10/7/0710/12/07

ASJC Scopus subject areas

  • Engineering(all)

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