Polymer field-effect-transistors (FETs) have been proposed for use in display driver circuitry, information storage and processing, and identity tags. To maximize performance in polymer FETs it is important to have a high carrier mobility. A major issue in this area is how the FET mobility, as measured by analysis of source-drain current-voltage characteristics, relates to the bulk mobility, as measured by a technique such as the time-of-flight (TOF) photocurrent or space-charge-limited current (SCLC) methods. Here we report comparative FET, TOF and SCLC measurements of polyfluorene copolymer devices. Poly (9,9-dioctylfluorene-co-bithiophene) (F8T2) and poly (9,9-dioctylfluorene- co-bis-N,N′-(4 butylphenyl)-bis-N,N′-phenyl-1,4-phenylenediamine) (PFB) were used as the active material. Polymer FETs were fabricated in two different structures. The first involved a silicon substrate with a thermally grown oxide dielectric onto which Au source-drain electrodes were deposited. The polymer was then spin-coated on top and annealed to improve the chain packing. The second involved spin-coating the polymer onto a glass substrate followed by the thermal evaporation of top Au source-drain contacts. A polymer insulator was then spin-coated followed by a top Au gate electrode. TOF and SCLC measurements were conducted on diode structures consisting of a polymer layer (of order 1 μm and 100nm respectively) sandwiched between indium-tin-oxide (ITO) or ITO coated with poly (ethylenedioxythiophene)/polystyrene sulphonic acid (PEDOT/PSS) on glass bottom electrode and a Au or Al top electrode. Trapping effects, and the difference between bulk and surface packing can describe the differences of mobilities derived from the three methods. It is interesting to note that they are all within a similar order.
|Original language||English (US)|
|Title of host publication||Proceedings of SPIE - The International Society for Optical Engineering|
|State||Published - Dec 1 2003|