Compact data structure and scalable algorithms for the sparse grid technique

Alin Murarasu, Josef Weidendorfer, Gerrit Buse, Daniel Butnaru, Dirk Pflüger

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

The sparse grid discretization technique enables a compressed representation of higher-dimensional functions. In its original form, it relies heavily on recursion and complex data structures, thus being far from well-suited for GPUs. In this paper, we describe optimizations that enable us to implement compression and decompression, the crucial sparse grid algorithms for our application, on Nvidia GPUs. The main idea consists of a bijective mapping between the set of points in a multi-dimensional sparse grid and a set of consecutive natural numbers. The resulting data structure consumes a minimum amount of memory. For a 10-dimensional sparse grid with approximately 127 million points, it consumes up to 30 times less memory than trees or hash tables which are typically used. Compared to a sequential CPU implementation, the speedups achieved on GPU are up to 17 for compression and up to 70 for decompression, respectively. We show that the optimizations are also applicable to multicore CPUs. Copyright © 2011 ACM.
Original languageEnglish (US)
Title of host publicationProceedings of the 16th ACM symposium on Principles and practice of parallel programming - PPoPP '11
PublisherAssociation for Computing Machinery (ACM)
Pages35-45
Number of pages11
ISBN (Print)9781450301190
DOIs
StatePublished - 2011
Externally publishedYes

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