CMOS-RC Colpitts Oscillator Design Using Floating Fractional-Order Inductance Simulator

Aslihan Kartci, Norbert Herencsar, Lu bomir Brancik, Khaled N. Salama

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

This paper deals with CMOS fractional-order inductance (FoL) simulator design and its utilization in 2.75 th order Colpitts oscillator providing high frequency of oscillation. The proposed floating FoL is composed of two unity-gain current followers (CF±s), two inverting voltage buffers, a transconductor, and a fractional-order capacitor (FoC) of order 0.75, while the input intrinsic resistance of CF± is used as design parameter instead of passive resistor. The resulting equivalent inductance value of the FoL can be adjusted via order of FoC, which was emulated via 5 th -order Foster II RC network and values optimized using modified least squares quadratic method. In frequency range 138 kHz - 2.45 MHz the L y shows ±5 degree phase angle deviation. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±1 V supply voltages.
Original languageEnglish (US)
Title of host publication2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages905-908
Number of pages4
ISBN (Print)9781538673928
DOIs
StatePublished - Feb 28 2019

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