Challenges in barrier and seed layers characterization of copper technology IC devices

Kun Li*, E. Er, T. Yeow, D. Tang

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

1 Scopus citations

Abstract

Ta barrier and Cu seed layer characterization becomes extremely challenging with devices scaling down into 0.13 μm and 90 nm regime. This paper aims at providing a feasible solution for this challenge from both sample preparation and TEM imaging perspectives. Different sample preparation and imaging techniques are compared here.

Original languageEnglish (US)
Pages263-266
Number of pages4
StatePublished - Dec 6 2005
Event12th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2005 - Singapore, Singapore
Duration: Jun 27 2005Jul 1 2005

Other

Other12th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2005
CountrySingapore
CitySingapore
Period06/27/0507/1/05

ASJC Scopus subject areas

  • Engineering(all)

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