In recent years Nano-electromechanical (NEM) relays have been proposed as promising candidates to complement or replace CMOS technology in ultra-low power applications, due to their zero off-state leakage and abrupt turn on/off behavior. The development of the air gap technology enables the implementation of vertical relays, compatible with the Back-End-of-Line (BEOL) CMOS fabrication processes. In this work, we present the design, implementation, and analysis of integrated sequential logic blocks built with BEOL NEM relays, using custom and commercial modeling and simulation tools. While relay circuits are inevitably slower than transistor counterparts due to the mechanical nature of the operation, we show that the proposed circuits offer more than one order of magnitude saving on energy and area consumption. This is particularly attractive in the Internet of Things (IoT) applications, where the requirements for ultra-low power consumption are significantly stricter than those for computation speed.
|Original language||English (US)|
|Title of host publication||2019 IEEE International Symposium on Circuits and Systems (ISCAS)|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|State||Published - May 2019|