A comprehensive materials set has been fabricated and characterized to address the challenging issues in both gate first and gate last HK/MG CMOS. Specifically, metal gate thermal budget and channel composition are shown to be effective methods to engineer pMetal effective work function for gate last and gate first, respectively. Low temperature processing has resulted in low nMOS Vfb and high pMOS Vfb (ΔEWF=∼900mV) without the Vfb roll-off typically observed for gate first pMetals. Gate first high-k/metal gate CMOS has also been demonstrated using dual channel, single metal gate. Excellent pFET Ion-Ioff characteristics, 500 μA/μm at 1nA/μm for Vdd=1V have been achieved without additional strain engineering owing to: [i] optimized SiGe thickness, [ii] optimized Ge concentration, [iii] reduced Rext,[iv] minimized Coulomb scattering at short channel, and [v] scaled gate oxide thickness.