A system-level exploration of power delivery architectures for near-threshold manycores considering performance constraints

Ioannis Stamelakos, Amin Khajeh, Ahmed Eltawil, Gianluca Palermo, Cristina Silvano, Fadi Kurdahi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Continuous technology scaling and increased demand for computational power have introduced a paradigm shift in manycore design requirements. On the other hand, tight power budgets and limitations of voltage scaling are throttling the ability to optimally exploit the potential of these systems, leading researchers to adopt aggressive voltage scaling techniques such as Near-Threshold Computing (NTC). In this paper we evaluate and compare the efficiency of different power delivery schemes for NT manycore architectures under process variation while meeting performance constraints. For platforms operating in a specific voltage range, simple and cost effective Power Delivery (PD) architectures can deliver average power savings ranging from 24% up to 50%, when taking into account the workload characteristics of the target applications at design time1.
Original languageEnglish (US)
Title of host publicationProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
PublisherIEEE Computer Societyhelp@computer.org
ISBN (Print)9781467390385
DOIs
StatePublished - Sep 2 2016
Externally publishedYes

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