A novel damage-free high-k etch technique using neutral beam-assisted atomic layer etching (NBALE) for Sub-32nm technology node low power metal gate/High-k dielectric CMOSFETs

K. S. Min, C. Y. Kang, C. Park, C. S. Park, B. J. Park, J. B. Park, Muhammad Mustafa Hussain, Jack C. Lee, B. H. Lee, P. Kirsch, H. H. Tseng, R. Jammy, G. Y. Yeom

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

For the first time, a novel damage-free neutral beamassisted atomic etching process has successfully demonstrated the removal of the residual high-k dielectric layer after gate patterning. Due to its neutralized atomic flux and chemical reaction, high etch selectivity is observed to improve device performance and reliability. This process should significantly enhance high-k/metal gate manufacturability.

Original languageEnglish (US)
Title of host publication2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest
DOIs
StatePublished - Dec 1 2009
Event2009 International Electron Devices Meeting, IEDM 2009 - Baltimore, MD, United States
Duration: Dec 7 2009Dec 9 2009

Publication series

NameTechnical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)0163-1918

Other

Other2009 International Electron Devices Meeting, IEDM 2009
CountryUnited States
CityBaltimore, MD
Period12/7/0912/9/09

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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