A Low-Power Time-Domain Comparator for IoT Applications

Ali H. Hassan, Hassan Mostafa, Khaled N. Salama, Ahmed M. Soliman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

This paper introduces a low-power time-domain comparator with a modified current starved inverter circuit. The proposed comparator converts the analog input voltage into a time delay that creates a phase difference between the input signal and the reference signal. Then a phase detector is utilized to determine either the input signal is leading or lagging compared to the reference signal. Moreover, the power optimization is achieved by limiting the short circuit power (PSC) that passes through both charging and discharging phases. A prototype of the proposed comparator is designed and simulated in 0.13 µm CMOS technology where it draws 0.6 µA from a 1 V supply with a sampling rate equals 10 MHz. Moreover, the simulation results of the proposed comparator offer a FoM of 60 fJ/conversion step. Finally, the proposed time-domain comparator circuit is compatible with wide range of applications (i.e., internet of things (IoT) sensors and integrated DC-DC converters).
Original languageEnglish (US)
Title of host publication2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages1142-1145
Number of pages4
ISBN (Print)9781538673928
DOIs
StatePublished - Feb 28 2019

Fingerprint Dive into the research topics of 'A Low-Power Time-Domain Comparator for IoT Applications'. Together they form a unique fingerprint.

Cite this