A Low Power Hardware Implementation of Izhikevich Neuron using Stochastic Computing

Aya A. Ismail, Zeinab A. Shaheen, Osama Rashad, Khaled N. Salama, Hassan Mostafa

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper introduces the hardware implementation of one of the most popular spiking neuron models which is Izhikevich model. The main target of this implementation is to reduce area and power consumed by the Spiking Neural Network (SNN) neurons as the SNN consists of a large number of neurons to mimic the human brain. Therefore, stochastic computing techniques are used to perform the squaring term that consumes much of the power in the Izhikevich neuron model equations. A hardware implementation of the model is proposed to show the area and power consumption to help the SNN designers to choose between stochastic-based multipliers and the approximate multipliers considering their power, area, and accuracy constraints.
Original languageEnglish (US)
Title of host publication2018 30th International Conference on Microelectronics (ICM)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages315-318
Number of pages4
ISBN (Print)9781538681671
DOIs
StatePublished - May 2 2019

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