A compressive sensing algorithm for many-core architectures

A. Borghi*, J. Darbon, S. Peyronnet, T. F. Chan, S. Osher

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper describes a parallel algorithm for solving the l 1-compressive sensing problem. Its design takes advantage of shared memory, vectorized, parallel and many-core microprocessors such as Graphics Processing Units (GPUs) and standard vectorized multi-core processors (e.g. quad-core CPUs). Experiments are conducted on these architectures, showing evidence of the efficiency of our approach.

Original languageEnglish (US)
Title of host publicationAdvances in Visual Computing - 6th International Symposium, ISVC 2010, Proceedings
Pages678-686
Number of pages9
EditionPART 2
DOIs
StatePublished - Dec 1 2010
Externally publishedYes
Event6th International, Symposium on Visual Computing, ISVC 2010 - Las Vegas, NV, United States
Duration: Nov 29 2010Dec 1 2010

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
NumberPART 2
Volume6454 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference6th International, Symposium on Visual Computing, ISVC 2010
CountryUnited States
CityLas Vegas, NV
Period11/29/1012/1/10

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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